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本帖最后由 深圳-绿皮 于 2013-11-22 10:14 编辑 3 D$ U2 S, h% Q! G" a
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DATE: 11-15-2013 HOTFIX VERSION: 0193 v6 D- t! P1 J# ~
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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! w" K2 T" t1 W+ U6 Q* h0 G o( S1176155 CONCEPT_HDL CORE Graphics remnants with 16.6 QIR 3
" ?) p2 \8 W' l" j7 i1178272 CONCEPT_HDL OTHER Verilog netlist does not include split blocks correctly
: n9 h7 x4 f, H' h( L5 m0 Y1190782 FSP FPGA_SUPPORT Support for Altera > 5SGXEA9N2F45 device.
3 W, F5 v1 U# g1194140 ADW LRM SYNC_PROPERTIES is not resolving issues a based sync_properties settings
( C5 @9 |9 b: W% \1195744 APD EDIT_ETCH Diff_Pair routing fails on certain Uvias in the pair.
% i8 v6 I! X5 Y( T1196704 allegro_EDITOR INTERFACES ENH: During ipc2581 export checkboxes corresponding to 縈iscellaneous Image Layers� should automatically get selected7 D# |4 x& t3 m3 I% M3 J) N
1198340 ALLEGRO_EDITOR OTHER Multiple -product option on the Allegro command line does not access the second -product6 z! N: u4 w. ^! m( ]! i C
1198596 ALLEGRO_EDITOR INTERFACES When copper thickness is increased for the outer layers, step Viewer does not show correct component position.; s" A' h) A% g- g& B+ K
1199673 PCB_LIBRARIAN OTHER Component Browser fails to load footrpints if they are set with UNC path
! ~, I* j$ ?6 n. q: } i. M1199889 ALLEGRO_EDITOR DATABASE Allegro crashing with latest hotfix. F# V( z" w1 s4 d4 K6 G7 D( i9 J- D
1200303 ALLEGRO_EDITOR GRAPHICS 3D Viewer does not update after changing STEP model mapping
" a/ p- q- t2 A1200449 ALLEGRO_EDITOR REPORTS Allegro crashes when generating Net Loop Report.
: }& @6 G" o/ [- ^1200915 ALLEGRO_EDITOR DATABASE Reducing accuracy of this specific design crashes Allegro- D) N. N+ O1 F
1201011 ADW COMPONENT_BROWSE Component Browser crashes in DB mode$ O, L, d- h- Z" ~
1201376 ALLEGRO_EDITOR INTERFACES Allegro hangs when trying to map a specific STEP model to a package drawing.+ i" s) h7 X: k. C
1201897 SIP_layout IMPORT_DATA BGA Pin Colors not matching the Colors defined in the Symbol Spreadsheet after updating.
3 V( [0 @% Q. {1202709 ALLEGRO_EDITOR INTERFACES STEP File generated from Allegro is not overwritten when the variable "set ads_textrevs
2 M- ]9 H& O% x% Z/ T1202820 ALLEGRO_EDITOR INTERFACES Different xml generation for same step model on S106 and S017) C4 S3 s6 o. w6 X/ S
1202842 ALLEGRO_EDITOR INTERFACES Step model invisible for one pin dra in allegro 16.6 symbol editor: a$ ^1 b/ H, X$ {0 p
1202983 ALLEGRO_EDITOR SHAPE Shape voiding creates DRC with Route Keepout8 Z3 V. E; ]2 i7 T
1203125 ALLEGRO_EDITOR OTHER Exporting STEP file with External copper enabled does not show all copper when viewed with Solid Edge or Inventor
1 U2 w4 w5 P. P5 D4 B/ t# d1203236 ALLEGRO_EDITOR INTERFACES IPC2581 output with crosshatched shape is not correct( o- s6 H3 M, S# e) ~
1203995 CONCEPT_HDL CHECKPLUS CheckPlus rule, local_signal_no_offpage_body, getting an incorrect failure.
G; a5 S9 J, b0 y* T5 K1204629 ALLEGRO_EDITOR SKILL axlUIDataBrowse crashes the editor or returns error
2 p+ T' r& m1 b1204640 SIP_LAYOUT DIE_EDITOR Concurrent co-design update fails
3 v, z) V! J: g# Q1204881 SIP_LAYOUT BGA_GENERATOR Pin numbers are messed up after deleting a pin at a staggered bga
[/ a5 |9 S2 r6 _6 q1204885 CONCEPT_HDL CONSTRAINT_MGR Cant assign discrete models after the wrong model was removed.
% x2 z% [$ b' [; ~$ m1205374 ALLEGRO_EDITOR OTHER pdf out command creates incorrect drill Symbol Characters placement in pdf file when setting film mirrored.
1 I1 v1 o( b9 T- `$ k. ^; A# M5 u1205729 SIP_LAYOUT DIE_EDITOR update of codesign db fails on exit from die editor$ `0 x4 k; g, r; J
1205801 ALLEGRO_EDITOR OTHER Tool crash when do export IPF.8 m# d- ]8 L H; R3 s# M( s+ K! b
1205881 CONSTRAINT_MGR OTHER In CMGR , Objects > Create crashes Allegro' u& t9 w K0 W. m
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