分享：最新Hotfix_SPB17.20.022_wint_1of1补丁

crskynet

Fixed CCRs: SPB 17.2 HF022
06-16-2017  o1 T; \5 U5 L: N2 Z! B
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  R; ~! p: D, c/ D) [CCRID   Product            ProductLevel2 Title% k0 a9 ~. B+ ]" p6 B
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6 p: u2 F; l8 R) ]) b1755789 ADW                DBEDITOR      Checking in HSS Block returns 'Failed to create archive'
3 K, |" q6 Q' N% b0 x5 Q: V1731459 ADW                FLOW_MGR      Cannot open LRM from Flow Manager2 D, w* b% E. B1 w" X& h2 s$ i6 |: p! e6 Z
( t! `! v- i& E. [1 H9 F1731460 ADW                FLOW_MGR      Cannot open LRM from Flow Manager
7 R! V+ z. Z, R! y1 l% i/ A- r- ~1744081 ADW                FLOW_MGR      Error regarding configuration file when trying to open Workflow Manager
6 A7 K  q& k$ o4 F6 b1 J! u( o1756727 ADW                LIBIMPORT     EDM Library Import fails with java exceptions when merging classifications
2 O4 S) V7 V5 Q% h+ B/ S1743763 ADW                SRM           Find filter is grayed out when allegro PCB Editor is opened from EDM Flow Manager
% \+ {" x; o' H* l- [- [1748399 ALLEGRO_EDITOR     DATABASE      In release 17.2-2016, end caps not visible for certain clines in PCB Editor0 |7 \2 O: |  T# c0 X
1748522 ALLEGRO_EDITOR     INTERACTIV    A component mirrored using the 'funckey' command jumps to (0,0) position when the 'move' command is used on it% G: i) o* ]: q% B
& ^6 ]3 Y* V3 Q! I# p6 ?1 f1734983 ALLEGRO_EDITOR     INTERFACES    Secondary step model does not stay mapped after drawing is reopened
* ]& U7 T; [: Z: l1753704 ALLEGRO_EDITOR     REFRESH       Refreshing symbols crashes PCB Editor0 z( R3 a, f2 g
1493721 ALLEGRO_EDITOR     SHAPE         Voids on negative planes are not adhering to constraints
; d0 \+ H" a2 ^7 k1711242 ALLEGRO_EDITOR     SHAPE         Route keep out leads to partly unfilled shapes with gaps* W' E' Z2 c6 K3 W) J1 [
6 Z" V' L5 n/ _$ A0 x1726865 ALLEGRO_EDITOR     UI_GENERAL    Pop-up Mirror command does not mirror at cursor position: V' }! V: o6 c3 B8 b* k
1752987 ALLEGRO_EDITOR     UI_GENERAL    axlUIViewFileCreate zoom to xy location not working while in user created form.
, ?: [5 |$ [- L+ [- q; j+ B1755638 ALLEGRO_EDITOR     UI_GENERAL    In release 17.2-2016, zoom operations using mouse button not working when axlShellPost() is run
1719792 ALLEGRO_PROD_TOOLB CORE          Productivity Toolbox Z-DRC hangs or crashes PCB Editor
1624869 ALTM_TRANSLATOR    CAPTURE       A structure file is required to translate a third-party schematic to orcad Capture5 h) N& {5 y# @
9 {* y1 w0 d' N: H  ]5 @1707416 ALTM_TRANSLATOR    CAPTURE       Missing components and pins in the OrCAD Capture schematic translated from a third-party tool
1708825 ALTM_TRANSLATOR    CAPTURE       The third-party translator fails to translate the schematic+ C9 ]1 Y, w4 s
+ @: Y. C$ g& d; m. _8 C) f7 ~' q1719200 ALTM_TRANSLATOR    CAPTURE       The third-party translator fails to translate all the pages of a schematic
1546070 ALTM_TRANSLATOR    CORE          Third-party to DE-HDL schematic translation fails4 B1 C. ]  f# |, ~) R8 P
1700508 ALTM_TRANSLATOR    CORE          Third-party PCB translator does not work in release 17.2-2016
3 y3 g" ]$ G$ W9 k1699340 ALTM_TRANSLATOR    DE_HDL        Unable to import third-party schematic into DE-HDL using Import menu in PCB Editor
- C+ Z( K0 ]+ ~; v5 d6 t1630379 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator is not importing clines and vias+ M6 w# P. r% o4 N/ h
1708615 ALTM_TRANSLATOR    PCB_EDITOR    All items of third-party PCB not imported in release 17.2-20165 K; p5 P) [( l; r* |: ~6 ^: ^
1758296 APD                DXF_IF        DXF OUT: Rounded rectangle pads mirrored incorrectly
1756040 APD                IMPORT_DATA   The 'die text in' command ignores values after the decimal point; p3 O7 w) ~/ K# ^; u7 ^- D* _- H
1727206 APD                SHAPE         Merging two shapes results in an incorrect shape. b7 j$ \$ h; f0 e+ r+ k0 a5 a' B
1753682 CONCEPT_HDL        CONSTRAINT_MG Constraint Manager stops responding while cross probing DE-HDL
0 p( `- X( Z, Q9 E1721334 CONCEPT_HDL        CORE          dsreportgen not able to resolve gated part on schematic
1747559 CONCEPT_HDL        CORE          Copying a logic symbol without a part table entry results in ERROR(SPCODD-53)9 P' k2 i6 F, w) N% Y' b4 H; j
$ O1 w3 H& }% O8 p% f1 p6 t" {1749644 CONCEPT_HDL        CORE          In release 17.2-2016 Hotfix 019, 'align components' is not working on Windows 8 and DE-HDL crashes
1746910 CONCEPT_HDL        GLOBALCHANGE  Global Component Change unable to identify part data when using schematic pick option) g1 d% F: {9 T; v# V; J
+ W* R( A2 J( A  m* D0 b1743572 FLOWS              PROJMGR       Project Manager displays incorrect values in Project Setting1 _1 M4 m; C, x: }1 X& g! H. ]
1724124 FSP                DESIGN_EXPLOR Provide TCL command to filter design connectivity window) c! K1 Y' J3 Z1 C* \
: i& n8 q: B0 q* k' M* \# ?6 D  @1719105 FSP                GUI           Tabular sorting not working in FPGA System Planner
1755750 PCB_LIBRARIAN      GRAPHICAL_EDI In release 17.2-2016, unable to delete _N pins in PDV Symbol Editor
1722993 PCB_LIBRARIAN      IMPORT_CSV    Part Developer crashes while importing part information stored in a .csv file# V, A  b0 p% h7 A  p; ?! B
1758856 SIP_layout         3D_VIEWER     Correct the spelling error in the 3D Viewer Design Configuration window' m. x) g8 u0 Z; B) B* g$ {
1755179 SIP_LAYOUT         ARTWORK       PCB Editor crashes when creating Gerber files# \8 x4 c0 g- o7 q& O
1 u  z7 }4 L* N; B' C" g1743511 SIP_LAYOUT         MANUFACTURING Package Design Integrity shows non-redundant padstacks in the Redundant Padstacks check


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